Target Board Information
STMicroelectronics STb710x Reference Board (mb442)
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STb7100 Reference board
| Board name | stb7100ref |
| Board Id | mb442 |
| Chip | STx7100 |
| Target CPU | ST40-202 |
| Memory | 2x64 or 128+64Mb |
| Flash | 8Mb |
| STEM connector | No |
| On board Ethernet | SMSC91C111 |
This board is reference design for a STb7100 based
set-top-box. Thus the STb7100 is usually (but not always) soldered down.
Frequently this board is supplied with no silk screening, so take
care to check the location and orientation of connectors and
switches.
This board was designed by the CoCo organisation (hence its name), although
it was later adopted by STS and gained the board identifier mb442.
This board can also take a STb7109, in which case a second Ethernet
connection is available using the STb7109's on-chip MAC with
an external STE100P PHY.
For more details on identifying the mb442 please see the
version information page.
Hardware Setup
Switch settings
The STb7100 Reference Board shares the same
switch settings as other STb710x boards.
Serial ports
| Panel name |
Schematic name |
Type |
Chip name |
Device |
Cable type for console |
| - | CN35-1 (lower) | ASC | UART2 | /dev/ttyAS0 | Null modem |
| - | CN35-2 (upper) | ASC | UART3 | /dev/ttyAS1 | Null modem |
EMI Config
| EMI config | Needs update |
| Boot script name |
| 7100 cut | SysA Xtal | LMI SYS | Bypass to ST40 | TapMux |
| 1.1 | 27MHz | 64MB | mb442stb7100cut11bypass27MHz | mb442stb7100cut11stmmx27MHz |
| 1.1 | 30MHz | 64MB | mb442stb7100cut11bypass30MHz | mb442stb7100cut11stmmx30MHz |
| 2.0 | 27MHz | 64MB | mb442stb7100cut20bypass27MHz | mb442stb7100cut20stmmx27MHz |
| 2.0 | 30MHz | 64MB | mb442stb7100cut20bypass30MHz | mb442stb7100cut20stmmx30MHz |
| 3.0 | 27MHz | 64MB | mb442stb7100cut20bypass27MHz | mb442stb7100cut20stmmx27MHz |
| 3.0 | 30MHz | 64MB | mb442stb7100cut20bypass30MHz | mb442stb7100cut20stmmx30MHz |
| 3.1+ | 27MHz | 64MB | mb442stb7100cut31bypass27MHz | mb442stb7100cut31stmmx27MHz |
| 3.1+ | 27MHz | 128MB | mb442stb7100cut31bypass27MHz128MB | mb442stb7100cut31stmmx27MHz128MB |
| 3.1+ | 30MHz | 64MB | mb442stb7100cut31bypass30MHz | mb442stb7100cut31stmmx30MHz |
| 3.1+ | 30MHz | 128MB | mb442stb7100cut31bypass30MHz128MB | mb442stb7100cut31stmmx30MHz128MB |
| 7109 cut | SysA Xtal | LMI SYS | Bypass to ST40 | TapMux |
| 1.0 | 27MHz | 64MB | mb442stb7109cut10bypass27MHz | mb442stb7109cut10stmmx27MHz |
| 1.0 | 30MHz | 64MB | mb442stb7109cut10bypass30MHz | mb442stb7109cut10stmmx30MHz |
| 2.0 | 27MHz | 64MB | mb442stb7109cut20bypass27MHz | mb442stb7109cut20stmmx27MHz |
| 2.0 | 30MHz | 64MB | mb442stb7109cut20bypass30MHz | mb442stb7109cut20stmmx30MHz |
| 3.x | 27MHz | 64MB | mb442stb7109cut30bypass27MHz | mb442stb7109cut30stmmx27MHz |
| 3.x | 27MHz | 128MB | mb442stb7109cut30bypass27MHz128MB | mb442stb7109cut30stmmx27MHz128MB |
| 3.x | 30MHz | 64MB | mb442stb7109cut30bypass30MHz | mb442stb7109cut30stmmx30MHz |
| 3.x | 30MHz | 128MB | mb442stb7109cut30bypass30MHz128MB | mb442stb7109cut30stmmx30MHz128MB |
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Known problems
External crystal selection
You may need to modify the kernel configuration for a 7100 Reference
(COCO) board, depending on the value of one of the 3 crystals on
board. Locate the 3 crystals, and note their values.
| Location | Purpose | Specification |
| Near UDI connector | SysA Oscillator | 30MHz or 27MHz |
| Near CPU | SysB Oscillator | 30MHz |
| Near Ethernet Chip | Ethernet | 25MHz |
From kernel release 2.6.11_st2.0-22 this frequency can be set
through a kernel configuration option: CONFIG_SH_EXTERNAL_CLOCK.
This option can be selected through the kernel configuration option:
System type --> External clock
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For earlier kernels this change requires manually editing the
config files.
If the crystal near the UDI connector is 30MHz (default for European
boards), then no further changes to the kernel need to be applied -
just build it as normal. If on the other hand the crystal near the
UDI connector is 27MHz (default for AP boards), then an additional
configuration change is required to the kernel before it is built.
For boards with 27MHz crystals, please edit the following file,
in the kernel source tree you are building the kernel:
arch/sh/Kconfig
Find the following lines (circa line number 900):
config SH_EXTERNAL_CLOCK int depends on CPU_SUBTYPE_ST40 default "30000000" if SH_STB7100_REF default "27000000"
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Comment out the line with 30000000 on it, by prepending
it with a hash (pound) character, so it looks like the following:
config SH_EXTERNAL_CLOCK int depends on CPU_SUBTYPE_ST40 # default "30000000" if SH_STB7100_REF default "27000000"
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Save it, then build the kernel as normal.
Use of the second I2C bus
The Linux kernel (from release stm20-32) disables
the I2C support for SSC1 on the 7100-ref (CoCo) board.
This is necessary because, contrary to the datasheet, SSC1 is not
available for use as an I2C bus because there is a permanently
active SPI serial FLASH device attached to this bus that cannot
be disabled without a board modification.
If you wish to use this I2C bus via the header, then
desolder and lift the /CS pin 1 of the
M25P10-A device attached to this bus and connect it to Vcc (pin 8).
An even better solution would be to connect /CS to a PIO pin so that
the device could still be used.
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