Distribution Guide Device drivers SSC Serial Protocol Interface (SPI) driver

SSC Serial Protocol Interface (SPI) driver

The SPI bus is a simple bus for communications in embedded applications. It was originally developed by Motorola. Only four signals are required for each SPI-enabled device:

• serial data in (SDI),

• serial data out (SDO),

• serial clock (SCK),

• device chip select (CS).

For some more background information about SSC, see the article from Embedded.com.

Multiple devices can be attached to a single bus by sharing the SDI, SDO and SCK lines. Each device must then be enabled or disabled by its own CS line, although multiple devices may share this if appropriate. An example of this shown in Figure 6: Master processor controlling two different SPI slave devices.

Figure 6: Master processor controlling two different SPI slave devices

The ST Linux distribution 2.0 includes an SPI driver which uses the hardware on-chip Synchronous Serial Controller (SSC) peripheral.

Configuring the kernel

By default the Linux kernel supplied with distribution 2.0 does not enable SPI support. The driver is enabled using the following kernel configuration menu:

Device Drivers ---> STM specific devices ---> STM Serial Peripheral Interface

The SPI driver is supported on the following platforms:

• STb7100 (mb411),

• ST220 Evaluation board (mb392 - STm8000).

Using the SPI device

Each STMicroelectronics' SoC can be equipped with a different number of SSC devices. Every SSC can be used as an I²C and/or an SPI bus. A user application can select the SPI bus by opening a particular device file: /dev/spi-<x> (where <x> is the number of the bus).

The device files are character devices with permissions, device name, major and minor numbers:

crw-rw-rw- /dev/spi-<x> 98, <x> 

The STMicroelectronics' SSC cannot provide the Chip Select (CS) signal, so the system must use the General PIO outputs to provide this functionality, as shown in Figure 7: STM-SPI interface.

Figure 7: STM-SPI interface

SPI driver ioctl calls

The SPI bus does not have a formal standard, and therefore different SPI slaves can show different behavior. The STMicroelectronics' solution is intended to cover all possible features of slaves.

To do this, the user application must set up parameters through the ioctl calls described below.

• SPI_IOCTL_POLARITY
  The polarity (PO) defines the logic level at which the clock idles. This is the state of the clock when the SPI bus is between transactions. A value of 1 indicates an idle level of logic 1 and a value of 0 indicates an idle level of logic 0. The default is 1.

• SPI_IOCTL_PHASE
  The clock phase (PH) indicates whether the clock changes state at the beginning of a clock cycle (set to 1) or during the second half of the cycle (set to 0, phase shift 180 degrees). The default is 1.
   
  When combined with the clock polarity, any combination of edge triggered behavior and half-cycle clock delay can be provided.

The clock polarity (PO) and phase (PH) are slave device dependant, and the different combinations are shown in Figure 8: Clock polarity and phase combinations.

Figure 8: Clock polarity and phase combinations

• SPI_IOCTL_HEADING
  This setting determines the bit order of the output data. A value of 1 indicates that the MSB is sent out first and a value of 0 indicates that the LSB is sent out first. The default is 1.
   
  An example showing a 9-bit data frame is shown in Figure 9: Bit order.
  
  

  Figure 9: Bit order

• SPI_IOCTL_CSACTIVE
  This setting indicates how the slave device should be selected. A value of 1 indicates that the slave CS is active high and a value of 0 indicates that the slave CS is active low. The default is 0.

• SPI_IOCTL_BAUDRATE
  This gives the transmission baud rate (in Hertz). The default is 1 MHz.

• SPI_IOCTL_WIDEFRAME
  This setting controls the data frame width. A value of 1 indicates that the data frame width is 16 bits and a value of 0 indicates that the data frame width is 8 bits. The default value is 1 (16 bits).

• SPI_IOCTL_ADDRESS
  This call controls the PIO CS mechanism. A PIO line is referenced by using an "address" value in the ioctl call.
   
  The PIO address is made up of the following bit-fields:
   
  Address = [7:Enable Duplex:7][6:PIO-Port:3][2:PIO-Pin:0]
   
  Bit 7 allows the selection of a real full duplex connection or a simulated half duplex connection. For example, an address of 0xa5 represents PIO4[5] with full duplex connection.

Example C code SPI software

int main (int argc, char **argv)
{
   unsigned int fd, address;
   char buf[1024];
 
   fd = open(argv[1], O_RDWR);
   if (!fd)
   {
      printf("Error on opened file\n");
      exit(0);
   }
   ioctl(fd,SPI_IOCTL_BUADRATE, 1000000); /* 1 MHz */
   ioctl(fd,SPI_IOCTL_HEADING,  1);
   ioctl(fd,SPI_IOCTL_PHASE,    1);
   ioctl(fd,SPI_IOCTL_POLARITY, 1);
 
   puts("Insert the Slave address");
   scanf("%x",&address);
   if ( ioctl(fd,SPI_IOCTL_ADDRESS,address) <0 )
   {
      printf("Error on PIO-Chip\n");
      close(fd);
      exit(0);
   }
   printf("Writing: %s on 0x%x device\n",argv[2],argv[1]);
   write(fd,argv[2],strlen(argv[2]));
 
   read(fd,buf,1024);
   printf("Read: %s\n",buf);
 
   close(fd );
   return 0;
}